The Ember CPU — Initial Design Part 8: Instruction Set Architecture (ISA)
- Tom Gambill
- Feb 28
- 1 min read
Updated: Mar 7

So far in this series, we have discussed the basic instruction types and addressing modes for the Ember CPU design. Next, we will look at the Instruction Set Architecture, or ISA, of the CPU as it stands. Keep in mind that this document and this CPU design are still a work in progress.
Most CPUs have an ISA document similar to the datasheet (which describes the external physical characteristics of the chip package) that explains the internal behavior of the various instructions, defining the operands for each, and additional details such as how they affect the status flags and any other side effects.
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